5G毫米波反向陣極簡構架與CMOS芯片實現(xiàn)

郭嘉誠; 胡三明; 沈一竹; 錢昀; 胡楚悠; 黃永明; 尤肖虎

doi:10.11999/JEIT240143

5G毫米波反向陣極簡構架與CMOS芯片實現(xiàn)

doi: 10.11999/JEIT240143

郭嘉誠^{1, 2},
胡三明^{1, 2},
沈一竹^{1, 2},
錢昀¹,
胡楚悠¹,
黃永明^{1, 2},
尤肖虎^{1, 2, ,}

1.
東南大學信息科學與工程學院南京 210096
2.
紫金山實驗室南京 211111

基金項目: 國家重點研發(fā)計劃(2019YFB2204701)，國家自然科學基金(61831006,62250610223)

詳細信息

作者簡介:
郭嘉誠：男，博士，研究方向為射頻、毫米波集成電路設計

胡三明：男，教授，博士生導師，研究方向為射頻、毫米波集成電路設計

沈一竹：女，教授，博士生導師，研究方向為毫米波電路及天線

錢昀：女，博士生，研究方向為射頻、毫米波集成電路設計

胡楚悠：女，碩士，研究方向為射頻、毫米波集成電路設計

黃永明：男，教授，博士生導師，研究方向為下一代移動通信技術

尤肖虎：男，教授，中國科學院院士，研究方向為未來移動通信理論與技術、智能信號處理與通信

通訊作者:
尤肖虎　xhyu@seu.edu.cn

中圖分類號: TN43
計量
- 文章訪問數(shù): 413
- HTML全文瀏覽量: 341
- PDF下載量: 60
- 被引次數(shù): 0
出版歷程
- 收稿日期: 2024-03-06
- 修回日期: 2024-04-29
- 網(wǎng)絡出版日期: 2024-05-12
- 刊出日期: 2024-05-30

Simplified Architecture of 5G Millimeter-wave Retrodirective Array and Its Implementation in CMOS Chips

GUO Jiacheng^{1, 2},
HU Sanming^{1, 2},
SHEN Yizhu^{1, 2},
QIAN Yun¹,
HU Chuyou¹,
HUANG Yongming^{1, 2},
YOU Xiaohu^{1, 2
, ,}

1.
School of Information Science and Engineering, Southeast University, Nanjing 210096, China
2.
Purple Mountain Laboratories, Nanjing 211111, China

Funds: The National Key Research and Development Program of China (2019YFB2204701), The National Natural Science Foundation of China (61831006, 62250610223)

摘要

摘要: 該文首次報道了一種極簡構架的5G毫米波反向陣設計原理及其CMOS芯片實現(xiàn)技術。該毫米波反向陣極簡構架，利用次諧波混頻器提供相位共軛和陣列反向功能，無需移相電路及波束控制系統(tǒng)，便可實現(xiàn)波束自動回溯移動通信功能。該文采用國產(chǎn)0.18 μm CMOS工藝研制了5G毫米波反向陣芯片，包括發(fā)射前端、接收前端及跟蹤鎖相環(huán)等核心模塊，其中發(fā)射及接收前端芯片采用次諧波混頻及跨導增強等技術，分別實現(xiàn)了19.5 dB和18.7 dB的實測轉(zhuǎn)換增益。所實現(xiàn)的跟蹤鎖相環(huán)芯片具備雙模工作優(yōu)勢，可根據(jù)不同參考信號支持幅度調(diào)制及相位調(diào)制，實測輸出信號相噪優(yōu)于–125 dBc/Hz@100 kHz。該文給出的測試結果驗證了所提5G毫米波反向陣通信架構及其CMOS芯片實現(xiàn)的可行性，從而為5G/6G毫米波通信探索了一種架構極簡、成本極低、拓展性強的新方案。
- 毫米波集成電路 /
- CMOS /
- 反向陣 /
- 射頻前端
Abstract: For the first time, a simplified architecture for 5G millimeter-wave retrodirective arrays and its implementation in CMOS chips is reported in this paper. Phase conjugation and retrodirective functions are provided by sub-harmonic mixers in the simplified architecture, eliminating the need for phase-shifting circuits and beam-controlling systems, thereby enabling automatic beam tracking for mobile communications. For validation, a domestic 0.18 μm CMOS process is employed to realize a 5G millimeter-wave retrodirective array chip, comprising core modules such as the transceiver front-ends and tracking phase-locked loop. Measured conversion gains of 19.5 dB for transmitting and 18.7 dB for receiving are achieved by the transceiver front-end chip utilizing sub-harmonic mixing and gm-boosting techniques. Dual-mode operation capabilities, supporting both amplitude modulation and phase modulation based on different reference signals, are provided by the implemented tracking phase-locked loop chip, with measured output signal phase noise lower than –125 dBc/Hz@100 kHz. The feasibility of the proposed 5G millimeter-wave retrodirective array communication architecture and its CMOS chip implementation is validated by the test results presented in this paper, thus offering a new solution for 5G/6G millimeter-wave communication characterized by its extremely simplified architecture, low cost, and high scalability.
- Millimeter-wave integrated circuit /
- CMOS /
- Retrodirective array /
- Radio Frequency (RF) front-end

HTML全文

圖 1 反向陣基本架構

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圖 2 本文所提5G毫米波反向陣架構

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圖 3 接收前端原理圖

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圖 4 帶有補償電感的等效電路

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圖 5 本振網(wǎng)絡輸出的瞬時仿真波形

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圖 6 發(fā)射前端原理圖

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圖 7 5G毫米波反向陣跟蹤鎖相環(huán)結構框圖

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圖 8 跟蹤鎖相環(huán)中的整形電路

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圖 9 5G毫米波頻段接收前端芯片顯微照片

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圖 10 下變頻次諧波混頻器增益測試結果

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圖 11 接收前端增益測試結果

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圖 12 5G毫米波頻段發(fā)射前端芯片顯微照片

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圖 13 上變頻混頻器增益測試結果

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圖 14 發(fā)射前端增益測試結果

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圖 15 5G毫米波頻段跟蹤相環(huán)芯片顯微照片

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圖 16 跟蹤鎖相環(huán)芯片測試

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圖 17 跟蹤鎖相環(huán)芯片測試結果

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圖 18 跟蹤鎖相環(huán)芯片通信性能測試設置

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圖 19 AM調(diào)制模式下的測試波形

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圖 20 QPSK調(diào)制模式下測得的星座圖

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表 1 下變頻次諧波混頻器性能對比總結

	文獻[27]	文獻[28]	文獻[29]	本文
工藝	0.13 μm CMOS	GaInP/GaAs	0.18 μm CMOS	0.18 μm CMOS
頻率(GHz)	8.65	10.00	21.00～40.00	22.00～29.00
增益(dB)	6.0	10.0	–8.2	7.0
輸入P1dB(dBm)	–18.0	–12.0	–4.0	–11.4
功耗(mW)	0.6	20.0	74.6	30.6

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表 2 低噪聲放大器性能對比總結

	文獻[30]	文獻[31]	文獻[32]	本文
工藝	0.18 μm CMOS	0.18 μm CMOS	0.13 μm CMOS	0.18 μm CMOS
中心頻率(GHz)	22.0	25.7	24.0	25.0
增益(dB)	15.0	8.9	12.1	12.1
噪聲系數(shù)(dB)	6.00	6.93	10.40	7.30
功耗(mW)	16.0	30.0	12.0	34.2

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表 3 上變頻次諧波混頻器性能對比總結

	文獻[33]	文獻[34]	文獻[35]	本文
工藝	65 nm CMOS	0.15 μm CMOS	65 nm CMOS	0.18 μm CMOS
頻率(GHz)	27.0～44.0	24.0～44.0	19.5～31.5	23.5～29.5
增益(dB)	–10.5	10.5	–5.1	6.0
輸出P1dB(dBm)	–9.0	–11.5	–15.4	–11.8
功耗(mW)	0	225.0	55.6	23.4

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表 4 功率放大器性能對比總結

	文獻[36]	文獻[37]	本文
工藝	0.18 μm CMOS	0.18 μm CMOS	0.18 μm CMOS
中心頻率(GHz)	24	24	25
增益(dB)	7.0	11.0	14.5
輸出P1(dB)	11.0	10.0	4.5
功耗(mW)	100	42	118

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表 5 反向陣構架對比總結

	文獻[38]	文獻[39]	文獻[10]	文獻[19]	文獻[22]	本文
芯片集成	×	×	×	√	√	√
工作頻段(GHz)	6.0	5.8	1.5	2.4	2.4	5G毫米波(26.0 GHz頻段)
調(diào)制方式及速率	BPSK 78.125 kB/s	AM 10 MB/s	16QAM 151.2 kB/s	×	AM 100 kB/s	AM 100 kB/s QPSK 1 MB/s

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參考文獻(39)

[1]	YU Yiming, CHEN Zhilin, ZHAO Chenxi, et al. A 39 GHz dual-channel transceiver chipset with an advanced LTCC package for 5G multi-beam MIMO systems[J]. Engineering, 2023, 22: 125–140. doi: 10.1016/j.eng.2022.04.023.
[2]	BOCCARDI F, HEATH R W, LOZANO A, et al. Five disruptive technology directions for 5G[J]. IEEE Communications Magazine, 2014, 52(2): 74–80. doi: 10.1109/MCOM.2014.6736746.
[3]	RAPPAPORT T S, SUN Shu, MAYZUS R, et al. Millimeter wave mobile communications for 5G cellular: It will work![J]. IEEE Access, 2013, 1: 335–349. doi: 10.1109/ACCESS.2013.2260813.
[4]	RAPPAPORT T S, XING Yunchou, KANHERE O, et al. Wireless communications and applications above 100 GHz: Opportunities and challenges for 6G and beyond[J]. IEEE Access, 2019, 7: 78729–78757. doi: 10.1109/ACCESS.2019.2921522.
[5]	YI Yongran, ZHAO Dixian, ZHANG Jiajun, et al. A 24–29.5-GHz highly linear phased-array transceiver front-end in 65-nm CMOS supporting 800-MHz 64-QAM and 400-MHz 256-QAM for 5G new radio[J]. IEEE Journal of Solid-State Circuits, 2022, 57(9): 2702–2718. doi: 10.1109/JSSC.2022.3169588.
[6]	WANG Yun, WU Rui, PANG Jian, et al. A 39-GHz 64-element phased-array transceiver with built-in phase and amplitude calibrations for large-array 5G NR in 65-nm CMOS[J]. IEEE Journal of Solid-State Circuits, 2020, 55(5): 1249–1269. doi: 10.1109/JSSC.2020.2980509.
[7]	SKOLNIK M and KING D. Self-phasing array antennas[J]. IEEE Transactions on Antennas and Propagation, 1964, 12(2): 142–149. doi: 10.1109/TAP.1964.1138179.
[8]	FUSCO V and BUCHANAN N. Developments in retrodirective array technology[J]. IET Microwaves, Antennas & Propagation, 2013, 7(2): 131–140. doi: 10.1049/iet-map.2012.0565.
[9]	FUSCO V F and KARODE S L. Self-phasing antenna array techniques for mobile communications applications[J]. Electronics & Communication Engineering Journal, 1999, 11(6): 279–286. doi: 10.1049/ecej:19990608.
[10]	BUCHANAN N B, FUSCO V F, and VAN DER VORST M. SATCOM retrodirective array[J]. IEEE Transactions on Microwave Theory and Techniques, 2016, 64(5): 1614–1621. doi: 10.1109/TMTT.2016.2541121.
[11]	BRENNAN P V. An experimental and theoretical study of self-phased arrays in mobile satellite communications[J]. IEEE Transactions on Antennas and Propagation, 1989, 37(11): 1370–1376. doi: 10.1109/8.43556.
[12]	DING Yuan, BUCHANAN N B, FUSCO V F, et al. Analog/digital hybrid delay-locked-loop for K/Ka band satellite retrodirective arrays[J]. IEEE Transactions on Microwave Theory and Techniques, 2018, 66(7): 3323–3331. doi: 10.1109/TMTT.2018.2829714.
[13]	REN Y J and CHANG Kai. New 5. 8-GHz circularly polarized retrodirective rectenna arrays for wireless power transmission[J]. IEEE Transactions on Microwave Theory and Techniques, 2006, 54(7): 2970–2976. doi: 10.1109/TMTT.2006.877422.
[14]	GUO Jiacheng, WANG Jun, and HU Sanming. Circularly polarized retrodirective array for far-field wireless power transfer[C]. 2019 IEEE Asia-Pacific Microwave Conference (APMC), Singapore, 2019: 429–431. doi: 10.1109/APMC46564.2019.9038263.
[15]	CHAN P and FUSCO V. Bi-static 5.8 GHz RFID range enhancement using retrodirective techniques[C]. 2011 41st European Microwave Conference, Manchester, UK, 2011: 976–979. doi: 10.23919/EuMC.2011.6101753.
[16]	DARDARI D, LOTTI M, DECARLI N, et al. Establishing multi-user MIMO communications automatically using retrodirective arrays[J]. IEEE Open Journal of the Communications Society, 2023, 4: 1396–1416. doi: 10.1109/OJCOMS.2023.3289326.
[17]	ETTORRE M, ALOMAR W A, and GRBIC A. 2-D Van Atta array of wideband, wideangle slots for radiative wireless power transfer systems[J]. IEEE Transactions on Antennas and Propagation, 2018, 66(9): 4577–4585. doi: 10.1109/TAP.2018.2851197.
[18]	LI Ying and JANDHYALA V. Design of retrodirective antenna arrays for short-range wireless power transmission[J]. IEEE Transactions on Antennas and Propagation, 2012, 60(1): 206–211. doi: 10.1109/TAP.2011.2167897.
[19]	GUO Jiacheng, SHEN Yizhu, YE Kai, et al. Differential retrodirective array with integrated circuits in low-cost 0.18 μm CMOS for automatic tracking[J]. IEEE Transactions on Antennas and Propagation, 2022, 70(2): 1587–1590. doi: 10.1109/TAP.2021.3111206.
[20]	VAN ATTA L G. Electromagnetic reflector[P]. U. S. , 2908002, 1959.
[21]	PON C. Retrodirective array using the heterodyne technique[J]. IEEE Transactions on Antennas and Propagation, 1964, 12(2): 176–180. doi: 10.1109/TAP.1964.1138191.
[22]	GUO Jiacheng, SHEN Yizhu, DONG Guoqing, et al. A retrodirective array enabled by CMOS chips for two-way wireless communication with automatic beam tracking[J]. Engineering, 2024. doi: 10.1016/j.eng.2023.12.010.
[23]	CHEN W K. Theory and design of broadband matching networks: Applied electricity and electronics[M]. Oxford: Pergamon, 2013.
[24]	CAULTON M, HERSHENOV B, KNIGHT S P, et al. Status of lumped elements in microwave integrated circuits-present and future[J]. IEEE Transactions on Microwave Theory and Techniques, 1971, 19(7): 588–599. doi: 10.1109/TMTT.1971.1127586.
[25]	QIAN Yun, SHEN Yizhu, and HU Sanming. Millimeter-wave CMOS low-noise amplifier with high gain and compact footprint[J]. IEEE Microwave and Wireless Technology Letters, 2023, 33(6): 699–702. doi: 10.1109/LMWT.2023.3246166.
[26]	胡楚悠. 硅基毫米波功率放大器芯片設計[D]. [碩士論文]. 東南大學, 2022. doi: 10.27014/d.cnki.gdnau.2022.003381. HU Chuyou. Design of silicon-based millimeter-wave power amplifier chip[D]. [Master dissertation], Southeast University, 2022. doi: 10.27014/d.cnki.gdnau.2022.003381.
[27]	HE Shan and SAAVEDRA C E. An ultra-low-voltage and low-power ×2 subharmonic downconverter mixer[J]. IEEE Transactions on Microwave Theory and Techniques, 2012, 60(2): 311–317. doi: 10.1109/TMTT.2011.2178259.
[28]	WU T H and MENG C. 10-GHz highly symmetrical sub-harmonic Gilbert mixer using GaInP/GaAs HBT technology[J]. IEEE Microwave and Wireless Components Letters, 2007, 17(5): 370–372. doi: 10.1109/LMWC.2007.895717.
[29]	HUNG S H, LEE Y C, SU Chunchi, et al. High-isolation millimeter-wave subharmonic monolithic mixer with modified quasi-circulator[J]. IEEE Transactions on Microwave Theory and Techniques, 2013, 61(3): 1140–1149. doi: 10.1109/TMTT.2013.2244229.
[30]	GUAN Xiang and HAJIMIRI A. A 24-GHz CMOS front-end[J]. IEEE Journal of Solid-State Circuits, 2004, 39(2): 368–373. doi: 10.1109/JSSC.2003.821783.
[31]	YU K W, LU Y L, CHANG D C, et al. K-band low-noise amplifiers using 0.18 μm CMOS technology[J]. IEEE Microwave and Wireless Components Letters, 2004, 14(3): 106–108. doi: 10.1109/LMWC.2004.825175.
[32]	HSIEH K A, WU H S, TSAI K H, et al. A dual-band 10/24-GHz amplifier design incorporating dual-frequency complex load matching[J]. IEEE Transactions on Microwave Theory and Techniques, 2012, 60(6): 1649–1657. doi: 10.1109/TMTT.2012.2191303.
[33]	TSAI J H, HSIEH Y Y, and LIU W H. A 27–44 GHz CMOS dual-ring subharmonic up-conversion mixer with linearization technique[J]. IEEE Microwave and Wireless Components Letters, 2022, 32(4): 347–350. doi: 10.1109/LMWC.2021.3124587.
[34]	SU Chunchi, LIU C H, LIN C M, et al. A 24–44 GHz broadband subharmonic mixer with novel isolation-enhanced circuit[J]. IEEE Microwave and Wireless Components Letters, 2015, 25(2): 124–126. doi: 10.1109/LMWC.2014.2382688.
[35]	LEE H S, MYEONG J, and MIN B W. A 26GHz CMOS 3× subharmonic mixer with a fundamental frequency rejection technique[J]. IEEE Access, 2020, 8: 122986–122996. doi: 10.1109/ACCESS.2020.3007316.
[36]	KOMIJANI A, NATARAJAN A, and HAJIMIRI A. A 24-GHz, +14.5-dBm fully integrated power amplifier in 0.18μm CMOS[J]. IEEE Journal of Solid-State Circuits, 2005, 40(9): 1901–1908. doi: 10.1109/JSSC.2005.848143.
[37]	MOSALAM H, ALLAM A, ABDEL-RAHMAN A, et al. A high-efficiency good linearity 21 to 26.5 GHz fully integrated power amplifier using 0.18 μm CMOS technology[C]. 2016 IEEE 59th International Midwest Symposium on Circuits and Systems (MWSCAS), Abu Dhabi, United Arab Emirates, 2016: 1–4. doi: 10.1109/MWSCAS.2016.7870065.
[38]	DIDOMENICO L D and REBEIZ G M. Digital communications using self-phased arrays[J]. IEEE Transactions on Microwave Theory and Techniques, 2001, 49(4): 677–684. doi: 10.1109/22.915442.
[39]	LEONG K M K H, WANG Yuanxun, and ITOH T. A full duplex capable retrodirective array system for high-speed beam tracking and pointing applications[J]. IEEE Transactions on Microwave Theory and Techniques, 2004, 52(5): 1479–1489. doi: 10.1109/TMTT.2004.827025.