兩種面向宇航應(yīng)用的高可靠性抗輻射加固技術(shù)靜態(tài)隨機(jī)存儲(chǔ)器單元
doi: 10.11999/JEIT240082
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合肥工業(yè)大學(xué)微電子學(xué)院 合肥 230601
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安徽工程大學(xué)集成電路學(xué)院 蕪湖 241000
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安徽理工大學(xué)計(jì)算機(jī)科學(xué)與工程學(xué)院 淮南 232001
Two Highly Reliable Radiation Hardened By Design Static Random Access Memory Cells for Aerospace Applications
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School of Microelectronics, Hefei University of Technology, Hefei 230601, China
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School of Integrated Circuit, Anhui University of Engineering, Wuhu 241000, China
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School of Computer Science and Engineering, Anhui University of Science and Technology, Huainan 232001, China
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摘要: CMOS尺寸的大幅縮小引發(fā)電路可靠性問(wèn)題。該文介紹了兩種高可靠的基于設(shè)計(jì)的抗輻射加固(RHBD)10T和12T抗輻射加固技術(shù)(SRAM)單元,它們可以防護(hù)單節(jié)點(diǎn)翻轉(zhuǎn)(SNU)和雙節(jié)點(diǎn)翻轉(zhuǎn)(DNU)。10T單元主要由兩個(gè)交叉耦合的輸入分離反相器組成,該單元可以通過(guò)其內(nèi)部節(jié)點(diǎn)之間的反饋機(jī)制穩(wěn)定地保持存儲(chǔ)的值。由于僅使用少量晶體管,因此其在面積和功耗方面開(kāi)銷也較低?;?0T單元,提出了使用4個(gè)并行存取訪問(wèn)管的12T單元。與10T單元相比,12T單元的讀/寫訪問(wèn)時(shí)間更短,且具有相同的容錯(cuò)能力。仿真結(jié)果表明,所提單元可以從任意SNU和部分DNU中恢復(fù)。此外,與先進(jìn)的加固SRAM單元相比,所提RHBD 12T單元平均可以節(jié)省16.8%的寫訪問(wèn)時(shí)間、56.4%的讀訪問(wèn)時(shí)間和10.2%的功耗,而平均犧牲了5.32%的硅面積。
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關(guān)鍵詞:
- CMOS /
- 靜態(tài)隨機(jī)存儲(chǔ)器單元 /
- 抗輻射加固 /
- 單節(jié)點(diǎn)翻轉(zhuǎn) /
- 雙節(jié)點(diǎn)翻轉(zhuǎn)
Abstract: Aggressive scaling of CMOS technologies can cause the reliability issues of circuits. Two highly reliable Radiation Hardened By Design (RHBD) 10T and 12T Static Random-Access Memory (SRAM) cells are presented in this paper, which can protect against Single Node Upsets (SNUs) and Double Node Upsets (DNUs). The 10T cell mainly consists of two cross-coupled input-split inverters and the cell can robustly keep stored values through a feedback mechanism among its internal nodes. It also has a low cost in terms of area and power consumption, since it uses only a few transistors. Based on the 10T cell, a 12T cell is proposed that uses four parallel access transistors. The 12T cell has a reduced read/write access time with the same soft error tolerance when compared to the 10T cell. Simulation results demonstrate that the proposed cells can recover from SNUs and a part of DNUs. Moreover, compared with the state-of-the-art hardened SRAM cells, the proposed RHBD 12T cell can save 16.8% write access time, 56.4% read access time, and 10.2% power dissipation at the cost of 5.32% silicon area on average. -
表 1 未加固/加固 SRAM 單元之間的可靠性和開(kāi)銷比較結(jié)果
SRAM 6T NASA 13T RHD 12T QCCM 12T QUCCE 12T DNU SRM We-Quatro Yan 14T QCCM 10T RHSC 12T SAR 14T RHBD 10T RHBD 12T 文獻(xiàn) – [18] [19] [20] [21] [22] [23] [25] [20] [26] [27] 本文 本文 SNUR × × √ × × √ × × × √ √ √ √ #DHP 0 0 2 1 0 16 2 0 1 0 0 4 4 RAT (ps) 26.55 128.67 25.72 12.99 13.02 6.63 12.99 51.2 18.20 36.89 32.92 25.88 11.21 WAT (ps) 4.11 18.2 5.06 4.22 4.31 4.71 4.38 4.09 23.21 3.83 4.84 7.11 4.21 功耗(nW) 5.24 18.92 10.38 10.43 10.43 20.86 10.43 7.78 11.45 8.93 10.6 9.02 9.32 10–3×面積(nm2) 4.35 9.07 8.27 8.71 8.71 17.42 8.71 10.25 7.79 8.71 12.44 7.30 8.71 下載: 導(dǎo)出CSV
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