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基于公式遞推法的可變計(jì)算位寬的循環(huán)冗余校驗(yàn)設(shè)計(jì)與實(shí)現(xiàn)

陳容 陳嵐 WAHLAArfan Haider

陳容, 陳嵐, WAHLAArfan Haider. 基于公式遞推法的可變計(jì)算位寬的循環(huán)冗余校驗(yàn)設(shè)計(jì)與實(shí)現(xiàn)[J]. 電子與信息學(xué)報(bào), 2020, 42(5): 1261-1267. doi: 10.11999/JEIT190503
引用本文: 陳容, 陳嵐, WAHLAArfan Haider. 基于公式遞推法的可變計(jì)算位寬的循環(huán)冗余校驗(yàn)設(shè)計(jì)與實(shí)現(xiàn)[J]. 電子與信息學(xué)報(bào), 2020, 42(5): 1261-1267. doi: 10.11999/JEIT190503
Rong CHEN, Lan CHEN, Arfan Haider WAHLA. Design and Implementation of Cyclic Redundancy Check with Variable Computing Width Based on Formula Recursive Algorithm[J]. Journal of Electronics & Information Technology, 2020, 42(5): 1261-1267. doi: 10.11999/JEIT190503
Citation: Rong CHEN, Lan CHEN, Arfan Haider WAHLA. Design and Implementation of Cyclic Redundancy Check with Variable Computing Width Based on Formula Recursive Algorithm[J]. Journal of Electronics & Information Technology, 2020, 42(5): 1261-1267. doi: 10.11999/JEIT190503

基于公式遞推法的可變計(jì)算位寬的循環(huán)冗余校驗(yàn)設(shè)計(jì)與實(shí)現(xiàn)

doi: 10.11999/JEIT190503
基金項(xiàng)目: 國家科技重大專項(xiàng)(2018ZX03001006-002)
詳細(xì)信息
    作者簡介:

    陳容:女,1991年生,博士生,研究方向?yàn)?G通信關(guān)鍵技術(shù)和物理層基帶芯片設(shè)計(jì)

    陳嵐:女,1968年生,研究員,主要研究方向?yàn)榧{米及SoC芯片設(shè)計(jì)方法學(xué)、移動(dòng)通訊系統(tǒng)低功耗技術(shù)及物聯(lián)網(wǎng)芯片技術(shù)等

    WAHLAArfan Haider:男,1988年生,博士生,研究方向?yàn)榛跈C(jī)器學(xué)習(xí)的智能無線網(wǎng)絡(luò)和車載網(wǎng)絡(luò)

    通訊作者:

    陳嵐 chenlan@ime.ac.cn

  • 中圖分類號(hào): TN911.72

Design and Implementation of Cyclic Redundancy Check with Variable Computing Width Based on Formula Recursive Algorithm

Funds: The National Science and Technology Major Project (2018ZX03001006-002)
  • 摘要:

    循環(huán)冗余校驗(yàn)(CRC)與信道編碼的級聯(lián)使用,可以有效改善譯碼的收斂特性。在新一代無線通信系統(tǒng),如5G中,碼長和碼率都具有多樣性。為了提高編譯碼分段長度可變的級聯(lián)系統(tǒng)的譯碼效率,該文提出一種可變計(jì)算位寬的CRC并行算法。該算法在現(xiàn)有固定位寬并行算法的基礎(chǔ)上,合并公式遞推法中反饋數(shù)據(jù)與輸入數(shù)據(jù)的并行計(jì)算,實(shí)現(xiàn)了一種高并行度的CRC校驗(yàn)架構(gòu),并且支持可變位寬的CRC計(jì)算。與現(xiàn)有的并行算法相比,合并算法節(jié)省了電路資源的開銷,在位寬固定時(shí),資源節(jié)約效果明顯,同時(shí)在反饋時(shí)延上也有將近50%的優(yōu)化;在位寬可變時(shí),電路資源的使用情況也有相應(yīng)的優(yōu)化。

  • 圖  1  LFSR實(shí)現(xiàn)的串行編解碼結(jié)構(gòu)

    圖  2  公式遞推法M位并行CRC計(jì)算

    圖  3  CRC與信道譯碼的級聯(lián)使用

    圖  4  可變計(jì)算位寬的CRC級聯(lián)系統(tǒng)

    圖  5  M位固定位寬合并計(jì)算

    圖  6  1~M位計(jì)算位寬可變的CRC計(jì)算

    圖  7  1~32位并行度可變的CRC編碼RTL實(shí)現(xiàn)

    表  1  硬件資源開銷

    項(xiàng)目
    頂層實(shí)體名crc_24
    芯片EP3C5E144C7(Cyclone III)
    邏輯器件數(shù)434/5136(8%)
    寄存器數(shù)26
    管腳數(shù)68/95(72%)
    下載: 導(dǎo)出CSV

    表  2  仿真測試結(jié)果

    總長度
    (bit)
    NumMatlab結(jié)果仿真結(jié)果
    數(shù)據(jù)1607, 24, 2900111101011011111111011024’h3d6ff6
    數(shù)據(jù)26523, 32, 1000111000001001101101000124’h3826d1
    數(shù)據(jù)37024, 15, 3101111110000001111101101124’h7e07db
    下載: 導(dǎo)出CSV

    表  3  選用的生成多項(xiàng)式

    CRC生成多項(xiàng)式
    CRC-12${x^{12}} + {x^{11}} + {x^3} + {x^2} + x + 1$
    CRC-16${x^{16}} + {x^{15}} + {x^2} + 1$
    CRC-32$\begin{array}{l}{x^{32}} + {x^{26}} + {x^{23}} + {x^{22}} + {x^{16}} + {x^{12}} + {x^{11}} + \\{x^{10}} + {x^8} + {x^7} + {x^5} + {x^4} + {x^2} + x + 1\end{array}$
    下載: 導(dǎo)出CSV

    表  4  電路資源和關(guān)鍵路徑長度比較

    CRC式子(M=r)算法總計(jì)
    1 異或 關(guān)鍵路徑
    CRC-12(12)文獻(xiàn)[7]1361129
    文獻(xiàn)[8] 120 66 8
    文獻(xiàn)[10] 103 8
    文獻(xiàn)[9] 77 53 8
    固定 52 43 5
    可變 64 78 9
    CRC-16(16) 文獻(xiàn)[7] 218 186 10
    文獻(xiàn)[8] 188 98 10
    文獻(xiàn)[10] 94 10
    文獻(xiàn)[9] 100 60 9
    固定 72 54 5
    可變 88 101 9
    CRC-32(32) 文獻(xiàn)[7] 1031 967 12
    文獻(xiàn)[8] 928 518 12
    文獻(xiàn)[10] 675 10
    文獻(xiàn)[9] 888 461 12
    固定 452 313 6
    可變 484 408 11
    下載: 導(dǎo)出CSV
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出版歷程
  • 收稿日期:  2019-07-15
  • 修回日期:  2019-10-30
  • 網(wǎng)絡(luò)出版日期:  2019-11-07
  • 刊出日期:  2020-06-04

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