一種面向粗粒度可重構(gòu)陣列的硬件木馬檢測(cè)算法的設(shè)計(jì)與實(shí)現(xiàn)
doi: 10.11999/JEIT180484
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解放軍信息工程大學(xué) ??鄭州 ??450001
Design and Implementation of Hardware Trojan Detection Algorithm for Coarse-grained Reconfigurable Arrays
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The PLA’s Information Engineering University, Zhengzhou 450001, China
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摘要: 硬件木馬檢測(cè)已成為當(dāng)前芯片安全領(lǐng)域的研究熱點(diǎn),現(xiàn)有檢測(cè)算法大多面向ASIC電路和FPGA電路,且依賴(lài)于未感染硬件木馬的黃金芯片,難以適應(yīng)于由大規(guī)??芍貥?gòu)單元組成的粗粒度可重構(gòu)陣列電路。因此,該文針對(duì)粗粒度可重構(gòu)密碼陣列的結(jié)構(gòu)特點(diǎn),提出基于分區(qū)和多變體邏輯指紋的硬件木馬檢測(cè)算法。該算法將電路劃分為多個(gè)區(qū)域,采用邏輯指紋特征作為區(qū)域的標(biāo)識(shí)符,通過(guò)在時(shí)空兩個(gè)維度上比較分區(qū)的多變體邏輯指紋,實(shí)現(xiàn)了無(wú)黃金芯片的硬件木馬檢測(cè)和診斷。實(shí)驗(yàn)結(jié)果表明,所提檢測(cè)算法對(duì)硬件木馬檢測(cè)有較高的檢測(cè)成功率和較低的誤判率。
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關(guān)鍵詞:
- 硬件木馬檢測(cè) /
- 粗粒度可重構(gòu)密碼陣列 /
- 邏輯指紋 /
- 多變體
Abstract: Hardware Trojan horse detection has become a hot research topic in the field of chip security. Most existing detection algorithms are oriented to ASIC circuits and FPGA circuits, and rely on golden chips that are not infected with hardware Trojan horses, which are difficult to adapt to the coarse-grained reconfigurable array consisting of large-scale reconfigurable cells. Therefore, aiming at the structural characteristics of Coarse-grained reconfigurable cryptographic logical arrays, a hardware Trojan horse detection algorithm based on partitioned and multiple variants logic fingerprints is proposed. The algorithm divides the circuit into multiple regions, adopts the logical fingerprint feature as the identifier of the region, and realizes the hardware Trojan detection and diagnosis without golden chip by comparing the multiple variant logic fingerprints of the regions in both dimensions of space and time. Experimental results show that the proposed detection algorithm has high detection success rate and low misjudgment rate for hardware Trojan detection. -
表 2 待測(cè)電路具體情況
電路編號(hào) 分區(qū)數(shù) 線(xiàn)網(wǎng)數(shù) 輸入 輸出 木馬面積占比(%) 原始電路 16 260 49 44 / C-10 16 260 49 44 0.015 S-10 16 260 49 44 0.025 CS-5/5 16 260 49 44 0.031 下載: 導(dǎo)出CSV
表 3 檢測(cè)算法實(shí)驗(yàn)結(jié)果對(duì)比(%)
電路編號(hào) ATMR DRMaSV RLF 本文算法 Rs Rf APCO Rs Rf APCO Rs Rf APCO Rs Rf APCO C-10 AES 91.1 1.02 91.3 97.2 0.37 93.7 93.1 0.45 52.1 97.3 0.31 93.2 SMS4 92.9 0.98 91.7 97.3 0.35 93.8 93.2 0.41 54.1 97.7 0.29 93.7 A5/1 89.7 0.99 89.9 93.5 0.32 93.9 91.1 0.37 52.7 94.7 0.30 92.1 均值 91.2 1.00 91.0 96.0 0.35 93.8 92.5 0.41 53.0 96.6 0.30 93.0 S-10 AES 89.7 1.13 90.2 93.2 0.39 93.5 89.6 0.47 53.7 93.4 0.32 93.3 SMS4 88.5 1.05 90.3 93.4 0.38 93.9 90.1 0.44 53.9 93.3 0.31 92.9 A5/1 85.3 1.01 89.7 90.5 0.33 93.4 90.2 0.39 54.1 92.7 0.33 91.7 均值 87.8 1.06 90.1 92.4 0.37 93.6 90.0 0.43 53.9 93.1 0.32 92.6 CS-5/5 AES 90.1 1.00 91.0 95.3 0.39 93.8 93.0 0.46 54.6 95.4 0.27 92.1 SMS4 91.3 0.99 91.3 95.6 0.37 94.0 92.7 0.43 54.7 95.6 0.27 93.2 A5/1 89.3 1.01 90.7 93.7 0.35 93.5 92.3 0.39 53.3 93.7 0.31 92.7 均值 90.2 1.00 91.0 94.9 0.37 93.8 92.7 0.43 54.2 94.9 0.28 92.7 均值 89.8 1.02 90.7 94.4 0.36 93.7 91.7 0.42 53.7 94.9 0.30 92.8 下載: 導(dǎo)出CSV
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