PMOS晶體管工藝參數(shù)變化對SRAM單元翻轉(zhuǎn)恢復(fù)效應(yīng)影響的研究

張景波; 楊志平; 彭春雨; 丁朋輝; 吳秀龍

doi:10.11999/JEIT170547

PMOS晶體管工藝參數(shù)變化對SRAM單元翻轉(zhuǎn)恢復(fù)效應(yīng)影響的研究

doi: 10.11999/JEIT170547

2.
(安徽大學(xué)電子信息工程學(xué)院合肥 230601) ②(工業(yè)和信息化部產(chǎn)業(yè)發(fā)展促進(jìn)中心北京 100804)

基金項(xiàng)目:

國家自然科學(xué)基金(61674002, 61474001, 61574001)

計(jì)量
- 文章訪問數(shù): 1135
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- PDF下載量: 236
- 被引次數(shù): 0
出版歷程
- 收稿日期: 2017-06-08
- 修回日期: 2017-08-31
- 刊出日期: 2017-11-19

Study on the Effect of Upset and Recovery for SRAM Under the Varying Parameters of PMOS Transistor

2.
(School of Electronics and Information Engineering, Anhui University, Hefei 230601, China)

Funds:

The National Natural Science Foundation of China (61674002, 61474001, 61574001)

摘要

摘要: 基于Synopsys公司3D TCAD器件模擬，該文通過改變3種工藝參數(shù)，研究65 nm體硅CMOS工藝下PMOS晶體管工藝參數(shù)變化對靜態(tài)隨機(jī)存儲器(Static Random Access Memory, SRAM)存儲單元翻轉(zhuǎn)恢復(fù)效應(yīng)的影響。研究結(jié)果表明：降低PMOS晶體管的P+深阱摻雜濃度、N阱摻雜濃度或調(diào)閾摻雜濃度，有助于減小翻轉(zhuǎn)恢復(fù)所需的線性能量傳輸值(Linear Energy Transfer, LET)；通過降低PMOS晶體管的P+深阱摻雜濃度和N阱摻雜濃度，使翻轉(zhuǎn)恢復(fù)時(shí)間變長。該文研究結(jié)論有助于優(yōu)化SRAM存儲單元抗單粒子效應(yīng)(Single-Event Effect, SEE)設(shè)計(jì)，并且可以指導(dǎo)體硅CMOS工藝下抗輻射集成電路的研究。
- 靜態(tài)隨機(jī)存儲器 /
- 線性能量傳輸值 /
- 翻轉(zhuǎn)恢復(fù)時(shí)間 /
- 單粒子效應(yīng)
Abstract: Based on Synopsys TCAD 3-D device simulation, the effects of PMOS transistor process parameters on the upset and recovery effect of Static Random Access Memory (SRAM) memory cell are studied in a 65-nm bulk CMOS technology, mainly by changing the three process parameters. The simulation results show that reducing the doping concentration of deep-P+-well, N-well and threshold doping concentration in PMOS transistor can decrease the Linear Energy Transfer (LET) value of the upset and recovery. By reducing the doping concentration of deep-P+-well and N-well in PMOS transistor, the time of the upset and recovery increases. The conclusion of this paper is helpful to optimize the design of Static Random Access Memory cell mitigating Single-Event Effect (SEE), and can gives a great guidance for the anti-radiation integrated circuit under bulk CMOS process.
- Static Random Access Memory (SRAM) /
- Linear Energy Transfer (LET) value /
- Time of the upset and recovery /
- Single-Event Effect (SEE)

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參考文獻(xiàn)(23)

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