自偏置PLL電源噪聲敏感度分析

李天一; 許曉冬; 尹韜; 韋援豐; 黃國(guó)城; 李威; 楊海鋼

doi:10.11999/JEIT161088

自偏置PLL電源噪聲敏感度分析

doi: 10.11999/JEIT161088

2.
(中國(guó)科學(xué)院電子研究所北京 100190) ②(中國(guó)科學(xué)院大學(xué) 北京 100049)

基金項(xiàng)目:

國(guó)家自然科學(xué)基金(61271149, 61474120)

計(jì)量
- 文章訪問(wèn)數(shù): 1464
- HTML全文瀏覽量: 251
- PDF下載量: 366
- 被引次數(shù): 0
出版歷程
- 收稿日期: 2016-10-17
- 修回日期: 2017-02-10
- 刊出日期: 2017-07-19

Sensitivity Analysis of Power Supply Noise Induced Jitter in Self Biased PLL

2.
(Institute of Electronics, Chinese Academy of Sciences, Beijing 100190, China)

Funds:

The National Natural Science Foundation of China (61271149, 61474120)

摘要

摘要: 該文提出一種基于傳遞函數(shù)的有效方法，可以預(yù)測(cè)自偏置PLL電源噪聲引起的抖動(dòng)性能。PLL的復(fù)制偏置調(diào)整器的電源噪聲敏感度由小信號(hào)分析提取，分析表明需要在閉環(huán)帶寬和電源噪聲敏感度之間做權(quán)衡。作為例子，該文分析了一款具體的自偏置PLL電路的電源噪聲性能，該P(yáng)LL為一款相位插值CDR提供時(shí)鐘。所提方法與瞬態(tài)仿真的結(jié)果進(jìn)行了對(duì)比，結(jié)果表明該方法可以預(yù)測(cè)周期抖動(dòng)數(shù)值，具有相當(dāng)精度。同樣，該方法也對(duì)提高自偏置PLL噪聲性能有指導(dǎo)意義。
- 電源噪聲抑制 /
- 自偏置PLL /
- 噪聲傳遞函數(shù) /
- 周期抖動(dòng)
Abstract: This paper presents an effective method based on transfer function to predict the jitter performance of self biased PLL due to power supply noise. The supply noise sensitivity of replica biased regulator of PLL is derived from small signal analysis. The analysis shows that there exist tradeoffs between the closed-loop bandwidth and supply noise sensitivity of regulator. As an example, the supply noise performance of one specific self biased PLL which is used as a clock generator in PI based CDR is analyzed. The comparison between transient simulation method and the proposed method is made. The results show that the proposed method can predict the value of period jitter with considerable accuracy. It can also give guidelines on how to further improve the noise performance of SBPLL.
- Supply noise rejection /
- Self biased PLL /
- Noise transfer function /
- Period jitter

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參考文獻(xiàn)(16)

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