面向AIC結(jié)構(gòu)的FPGA映射工具
doi: 10.11999/JEIT141403
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2.
(中國科學(xué)院電子學(xué)研究所可編程芯片與系統(tǒng)研究室 北京 100190) ②(中國科學(xué)院大學(xué) 北京 100049)
基金項目:
國家自然科學(xué)基金(61404140, 61271149, 61106033)資助課題
Mapper for AIC-based FPGAs
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2.
(System on Programmable Chip Research Department, Institute of Electronics, Chinese Academy of Sciences, Beijing 100190, China)
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摘要: 探索新的現(xiàn)場可編程門陣列(FPGA)邏輯單元結(jié)構(gòu)一直是FPGA結(jié)構(gòu)研究的重點方向，與非邏輯錐(AIC)作為一種新的邏輯結(jié)構(gòu)成為FPGA新結(jié)構(gòu)的希望。然而實現(xiàn)高效且靈活的映射工具同樣是研究FPGA新結(jié)構(gòu)中的重點環(huán)節(jié)。該文實現(xiàn)了一個面向AIC結(jié)構(gòu)的FPGA映射工具，與當(dāng)前映射工具相比，具有更高的靈活性，能夠支持AIC結(jié)構(gòu)參數(shù)的調(diào)節(jié)，輔助支持進(jìn)行AIC單元結(jié)構(gòu)的探索改進(jìn)。同時，該文提出的AIC映射工具與原工具相比，面積指標(biāo)提高了33%~36%。
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關(guān)鍵詞:
- 現(xiàn)場可編程門陣列 /
- 與非邏輯錐 /
- 映射
Abstract: Exploring a new logic element of Field Programmable Gate Array (FPGA) is always a key field in FPGAs research, while And-Inverter Cones (AIC) is the most promising one. Implementing a highly-efficient and highly-flexible mapping tool is also an important part of exploring new FPGA architecture. In this paper, a new mapper for AIC-based FPGA is implemented. Compared with an existing mapper, the new mapper has much higher flexibility, and supports adjustments of AICs architectural parameters to assit the design space exploration of AIC. Meanwhile, the new mapper provides area results 33%~36% better than the original mapper. -
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