一種模擬電路自動(dòng)綜合中的數(shù)據(jù)陣列描述方法
A Data Array Description Method in Automatic Synthesis of Analog Circuit
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摘要: 該文提出模擬電路的數(shù)據(jù)陣列描述方法及其與描述方法協(xié)同工作的電路生成規(guī)則。其中，數(shù)據(jù)陣列表述融入了成功的設(shè)計(jì)經(jīng)驗(yàn)，并且能夠有效地解決多端器件的電路連接問(wèn)題；電路生成規(guī)則確保在不出現(xiàn)無(wú)效電路結(jié)構(gòu)的前提下，生成高質(zhì)量的運(yùn)放電路結(jié)構(gòu)。這種新的生成式電路設(shè)計(jì)方法克服了選擇式拓?fù)湓O(shè)計(jì)方法依賴設(shè)計(jì)者經(jīng)驗(yàn)和生成式拓?fù)湓O(shè)計(jì)方法難以利用電路設(shè)計(jì)成功經(jīng)驗(yàn)的局限。從若干經(jīng)典子電路結(jié)構(gòu)開(kāi)始運(yùn)放電路自動(dòng)生成，保證了生成電路拓?fù)涞馁|(zhì)量。論文以運(yùn)放電路為例，利用該數(shù)據(jù)陣列描述方法和電路生成規(guī)則，實(shí)驗(yàn)生成兩個(gè)性能特點(diǎn)不同的運(yùn)放電路，并對(duì)電路參數(shù)進(jìn)行合理確定和電路仿真。
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關(guān)鍵詞:
- 模擬電路;自動(dòng)綜合;數(shù)據(jù)陣列描述方法
Abstract: This paper presents an analog circuit data array description method and circuit-constructing rules that coordinately work with description language. With the prerequisite of no invalid circuit structure, circuit-constructing rules create high quality op-amp circuit structure. This new technique, starting from classic sub-circuit model, automatically creating op-amp circuit, guarantees the quality of circuit construction. Results are reported to validate the effectiveness of this approach for construction-design automation of op-amp circuit. -
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