片上系統(tǒng)設(shè)計(jì)中軟硬件協(xié)同驗(yàn)證方法的研究
A Hardware-Software Co-verification Method for SOC Design
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摘要: 討論一種面向片上系統(tǒng)(SOC)設(shè)計(jì)的基于指令集模擬器和硬件模擬器的軟硬件協(xié)同驗(yàn)證方法。該方法能夠在SOC設(shè)計(jì)的早期對(duì)整個(gè)系統(tǒng)功能進(jìn)行驗(yàn)證,能夠?yàn)樵O(shè)計(jì)者提供一個(gè)純虛擬的軟硬件協(xié)同驗(yàn)證環(huán)境。重點(diǎn)討論協(xié)同模擬過(guò)程中軟硬件交互事件的產(chǎn)生和處理方法,以及軟硬件模擬器之間的同步和優(yōu)化方法,并且給出了事件驅(qū)動(dòng)硬件模擬器的協(xié)同模擬控制算法。最后給出了一個(gè)基于ARM7TDMI的設(shè)計(jì)驗(yàn)證實(shí)例。Abstract: This paper presents a hardware-software co-verification method for SOC design, which is based on instruction set simulator and hardware simulator, and used to validate function of SOC in the early design phase. The generating and processing methods of interactive events between hardware and software simulator during co-simulation are discussed in detail. An algorithm of synchronizing between hardware and software simulator is presented, and to reduce the synchronization overhead, some optimizing methods are introduced. Finally, an co-verification example of a design based on ARM7TDMI is given.
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