低秩大模板二維卷積算法的脈動陣列設(shè)計
SYSTOLIC ARRAY DESIGN FOR 2-D CONVOLUTIONS WITH BIG KERNEL IN LOW-RANK
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摘要: 本文針對低秩大模板二維卷積運(yùn)算的特點,給出了其快速算法,并利用基于相關(guān)圖的三步驟映射法設(shè)計了其脈動陣列實現(xiàn)結(jié)構(gòu)。該結(jié)構(gòu)并行效率高,并可達(dá)到線性加速比。
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關(guān)鍵詞:
- 低秩大模板二維卷積; 映射; 脈動陣列
Abstract: The characteristics of 2-D convolutions with big kernel in low-rank are analysed, and a fast algorithm is given. Then a systolic array implementation, which is derived by a three-stage dependence-graph-based mapping approach, is presented. It is shown that the architecture has a high efficiency for parallel processing and a nearly linear speed-up. -
Kung H T, Lam M S. J. Parallel and Distributed Computting, 1984, 1(1): 32-63.[2]De Vos L, Stegherr M. A Family of Application-Specific VLSI Architecture for the Block-Matching[3]Algorithm. in Systolic Array Processors, J.McCanny, J.Mcwhirter, E.Swartzlander, ed., Hertford-shire: Prentice-Hall, Inc., 1989, 421-430.[4]Bombardieri J. IEEE Trans. on Signal Processing, 1992, SP-40(5): 1253-1257.[5]Kung S Y. VLSI Array Processors, Englewood Cliffs: Prentice-Hall, Inc., 1988, 119-211. -
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