數(shù)字專用集成電路中平方運(yùn)算的硬件實(shí)現(xiàn)
REALIZATION OF THE SQUARE OPERATION IN DIGITAL ASIC
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摘要: 在進(jìn)行數(shù)字專用集成電路的設(shè)計(jì)中,尤其是應(yīng)用于通信和信號處理領(lǐng)域的ASICs中,經(jīng)常會遇到對一種特殊運(yùn)算平方運(yùn)算的硬件實(shí)現(xiàn)問題。本文從常規(guī)乘法器的設(shè)計(jì)入手,通過對乘法器部分積的規(guī)律進(jìn)行歸納總結(jié)和簡化操作,提出了適于VLSI實(shí)現(xiàn)的平方器的設(shè)計(jì)方法,該方法可極大地降低硬件規(guī)模。Abstract: The problem of the hardware realization of a special operation - the square operation is often encountered in the design of digital ASICs, especially the ASICs used in communication and signal processing area. From the study of the regular multiplier designed in VLSI circuit, a realization method for the square operation suitable for VLSI implementation is proposed in this paper. By means of simplifying the part products of the multiplication, big cuts have been made in the circuit scale of the new design.
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張也青,樂光新.電信科學(xué),1989, (3):30-35.[2][2][3]Neil Weste等著,茅于海,等譯. CM05 VLSI設(shè)計(jì)原理和系統(tǒng)展望.北京:高等教育出版社,1989-62, 68. -
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