用線性電壓掃描的電容-時(shí)間瞬態(tài)測(cè)定少子產(chǎn)生壽命
DETERMINATION OF GENERATION LIFETIME FROM C-t TRANSIENTS UNDER LINEAR VOLTAGE RAMP BIAS
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摘要: 本文建議用耗盡的線性掃描電壓掃描MOS電容樣品。掃描開始前MOS電容被置于強(qiáng)反型態(tài),以消除表面產(chǎn)生的影響。根據(jù)掃描所得的電容-時(shí)間瞬態(tài)曲線,可確定樣品中少于產(chǎn)生壽命。實(shí)驗(yàn)表明,對(duì)于同一個(gè)MOS電容樣品,不同電壓掃描率下得到的結(jié)果有很好的一致性,且與飽和電容法的結(jié)果相符合。
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關(guān)鍵詞:
- 半導(dǎo)體; MOS電容; 少子產(chǎn)生壽命
Abstract: When a linear voltage ramp applied to the gate of an MOS device the C-t transients are observed. Before the voltage ramp is applied the MOS capacitor is biased into strong inversion in order to eliminate the surface generation. From the C-t transient curve obtained experimentally, the minority carrier generation lifetime in semiconductor can be determined. The experimental results show that for the same sample the lifetimes extracted from the C-t curves obtained under different voltage sweep rates are consistent each other, and they are consistent with the lifetimes extracted fdom saturation capacitance method. -
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