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多層介質(zhì)中通孔結(jié)構(gòu)準(zhǔn)靜態(tài)電容參數(shù)的提取

宋犇,  洪偉

宋犇, 洪偉. 多層介質(zhì)中通孔結(jié)構(gòu)準(zhǔn)靜態(tài)電容參數(shù)的提取[J]. 電子與信息學(xué)報(bào), 1998, 20(1): 109-113.
引用本文: 宋犇, 洪偉. 多層介質(zhì)中通孔結(jié)構(gòu)準(zhǔn)靜態(tài)電容參數(shù)的提取[J]. 電子與信息學(xué)報(bào), 1998, 20(1): 109-113.
Song Ben, Hong Wei. CAPACITANCE EXTRACTION OF THE VIA HOLE STRUCTURE EMBEDDED IN THE MULTILAYERED DIELECTRIC MEDIA[J]. Journal of Electronics & Information Technology, 1998, 20(1): 109-113.
Citation: Song Ben, Hong Wei. CAPACITANCE EXTRACTION OF THE VIA HOLE STRUCTURE EMBEDDED IN THE MULTILAYERED DIELECTRIC MEDIA[J]. Journal of Electronics & Information Technology, 1998, 20(1): 109-113.

多層介質(zhì)中通孔結(jié)構(gòu)準(zhǔn)靜態(tài)電容參數(shù)的提取

CAPACITANCE EXTRACTION OF THE VIA HOLE STRUCTURE EMBEDDED IN THE MULTILAYERED DIELECTRIC MEDIA

  • 摘要: 本文采用維數(shù)縮減技術(shù)(DRT)提取了多層介質(zhì)中通孔結(jié)構(gòu)的準(zhǔn)靜態(tài)電容參數(shù)。由于該方法充分利用了集成電路結(jié)構(gòu)分層性的特點(diǎn),從而可以很方便地處理任意的介質(zhì)層數(shù)和結(jié)構(gòu)參數(shù),而僅需很少的計(jì)算時(shí)間和內(nèi)存.文中的計(jì)算結(jié)果與Ansoft軟件結(jié)果符合較好。
    Abstract: An efficient method to calculate the quasi-static capacitance of the via hole structure embedded in a multilayered dielectric media named Dimension Reduction Technique(DRT) is presented. Since the method takes full advantage of the characteristics of the stratified structure in integrated circuit, it can easily deal with the varied numbers of the dielectric layers as well as the varied structure parameters while only need little CPU time and memory space. The numerical results given in this paper are in good agreement with those of Ansofts software.
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  • Wang T, Mautz J R, Harrington R F. The excess capacitance of a microstrip via in a dielectric substrate, IEEE Trans on CAD, 1990, CAD-9(1): 48-56.[2]Wang T, Harrington R, FMautz J R. Quasistatic analysis of a microstrip through a hole in ground plane, IEEE Trans. on MTT, 1988, MTT-36(6): 1008-1013.[3]KOP P, De Zutter D. Capacitance of a circular symmetric model of a via hole including finite ground plane thickness. IEEE Trans. on MTT, 1991, MTT-39(7): 1229-1234.[4]Mathis A W, Butler C M. Capacitance of circular symmetric via for microstrip transmission line, IEEE Proc. -H, 1994, 141(8): 265-271.[5]Faton Tefiku, Eidichi Yamashita. Efficient method for the capacitance calculation of circularly symmetric via in mutilayered media, IEEE Microwave and Guided Wave Letters, 1995, 5(9): 305-307.[6]Zhenhai Zhu, Wei Hong, et al. Electromagnetic modeling and transient simulation of interconnects in high speed VLSI, IEEE Multi-chip module conference MCMC 95, Santa Cruz, California: 1995.[7]朱震海,洪偉,陳憶元.集成電路中多導(dǎo)體傳箱線的電磁參數(shù)提取和瞬態(tài)響應(yīng)分析[J].電子學(xué)報(bào).1996, 24(6):51-54[8]C Wei, Harrington R F, et al. Multiconductor transmission lines in multilayered dielectric media, IEEE Trans. on MTT, 1984, MTT-32(4): 439-450.
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出版歷程
  • 收稿日期:  1996-04-24
  • 修回日期:  1997-02-04
  • 刊出日期:  1998-01-19

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